This invention relates to an apparatus and method for testing the memory locations of a memory device. This application is related to U.S. Pat. No. 4,782,487, issued Nov. 1, 1988, entitled "Memory Test Method and Apparatus" and assigned to the same assignee as the present application.
In order to insure that data is accurately stored and retrieved, it is essential that all of the memory locations of a memory device are operating properly. In other words, it is essential that a data word written into a location be accurately read from that location when it is needed. However, memory locations will occasionally malfunction and a data word read from such a malfunctioning location may not match the data word that was written into the location. In order to avoid using data that has been unintentionally altered in this way, it is desirable to identify "bad" memory locations before they are used such that the bad memory can be repaired or replaced.
There are a number of known schemes for testing computer memories. One prior art method is to write all binary ones or zeros into a memory and then to read from the memory, checking for errors.
Another prior art method is to remain at each memory address long enough to write and read a series of data words at that address, wherein each data word comprises zeros and a single one, and the data words differ in the position of that single one bit. The one bit "walks" through each bit position as the data words are written into and read from the memory.
Some prior art memory testers use a simple increment-by-one counter to generate memory addresses, and some prior art memory testers employ more than one address counter to generate addresses while testing is done.
Another prior art method of memory testing, known as the Galpat test, involves staying at one address while changing data patterns that are written into and read from that address, and then moving on to and doing the same at other addresses. The amount of time it takes to run a Galpat test on a memory is generally proportional to the square of the number of memory addresses tested.
One prior art way to check data for errors is to check parity. Various prior art error detecting and correcting codes can be employed, including the Hamming code. The Hamming code offers the ability to detect errors involving two bits and detect and correct errors involving a single bit.